Q:

ARM clock speed on raspberry pi

Running bare-metal (no operating system, no Linux)
The specs implies the ARM can/does run 700MHz, the sys clock matches the manual and appears to be running at 250MHz.  Simple tests on the ARM imply that it is doing the same, for example with the instruction cache on
test:
  subs r0,r0,#1
  bne test

And vary the number of subs instructions to dominate over the branch, it is in the ball park of 250MHz but a long way away from 700MHz.
I there a phy setting that I am not seeing in the datasheet for multiplying the ARM clock?
EDIT:
Maybe my assumptions are flawed...
.globl ARMTEST0
ARMTEST0:
    subs r0,r0,#1
    bne ARMTEST0
    bx lr

.globl ARMTEST1
ARMTEST1:
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    bne ARMTEST1
    bx lr

.globl ARMTEST2
ARMTEST2:
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    subs r0,r0,#1
    bne ARMTEST2
    bx lr

.globl ARMTEST3
ARMTEST3:
    subs r1,r0,#1
    subs r2,r1,#1
    subs r3,r2,#1
    subs r0,r3,#1
    subs r1,r0,#1
    subs r2,r1,#1
    subs r3,r2,#1
    subs r0,r3,#1
    subs r1,r0,#1
    subs r2,r1,#1
    subs r3,r2,#1
    subs r0,r3,#1
    subs r1,r0,#1
    subs r2,r1,#1
    subs r3,r2,#1
    subs r0,r3,#1
    bne ARMTEST3
    bx lr

System timer ticks in hex per function (250Mhz system timer verified against stopwatch, etc).
02DB6DF7 ARMTEST0
02DB6E1C ARMTEST0
00AB6E2A ARMTEST1
00836E46 ARMTEST2
00836E2A ARMTEST3

Which gives:
ARMTEST0
0x01000000 subs instructions
0x01000000 bne  instructions
0x02000000 instructions
1.43 clocks per instruction.  175Mips.

ARMTEST1
0x01000000 sub instructions
0x00200000 bne instructions
0x01200000 instructions
1.68 instructions per clock. 420Mips

ARMTEST2
0x01000000 sub instructions
0x00100000 bne instructions
0x01100000 instructions
2.07 instructions per clock. 517Mips

ARMTEST3
0x01000000 sub instructions
0x00100000 bne instructions
0x01100000 instructions
2.07 instructions per clock. 517Mips

The ARM11 is super-scalar more than one instruction per clock is not unexpected.  I would expect more though.  Using only register 0 might mess with the pipe as you have to wait for one result of one instruction before executing the next.  I was expecting to see a difference between test 2 and 3, perhaps another bad assumption.  Maybe its really 500Mhz not 700?  There is one line in the linux sources that mentions a 500000000 clock.
static struct clk osc_clk = {
#ifdef CONFIG_ARCH_BCM2708_CHIPIT
    .rate = 27000000,
#else
    .rate = 500000000,  /* ARM clock is set from the VideoCore booter */
#endif
};

/* warning - the USB needs a clock > 34MHz */

#ifdef CONFIG_MMC_BCM2708
static struct clk sdhost_clk = {
#ifdef CONFIG_ARCH_BCM2708_CHIPIT
    .rate = 4000000,    /* 4MHz */
#else
    .rate = 250000000,  /* 250MHz */
#endif
};
#endif

Maybe what I think I have measured as 250Mhz is 270 and the ARM is at 500MHz?
EDIT2...DOH
That wasnt a great pipeline improvement was it, this is better:
.globl ARMTEST3
ARMTEST3:
    subs r0,r0,#1
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    subs r0,r0,#1
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    subs r0,r0,#1
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    subs r0,r0,#1
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    subs r0,r0,#1
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    subs r0,r0,#1
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    subs r0,r0,#1
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    subs r0,r0,#1
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    bne ARMTEST3
    bx lr

    ARMTEST3
    0x01000000 sub instructions
    0x08000000 nop instructions
    0x00100000 bne instructions
    0x09100000 instructions
    037000D7 system clocks
    2.64 instructions per clock. 659Mips

I failed to get config.txt to work at first, then re-build a linux sd card, booted it to find that the /boot/ directory is in fact the fat partition that contains the gpu boot files and the kernel.img arm boot file.  So NOT in a boot/ dir but in that same dir with the .bin's and .elf and .img file create config.txt and put arm_freq=something, the gpu bootloader then makes the modification to the pll multiplier so that when the arm starts it is at that speed.  I still expect more than 700 million instructions per second and am not seeing that, will need to keep trying I guess.

A:

Might be worth looking at the boot loader provided with the Arch Linux reference distribution from the Raspberry Pi organisation's download pages.  I have no idea whether it's a working option, but its config.txt includes the line
#arm_freq=800

There are also reports of people having overclocked the Pi - so information about initialising the clock is certainly out there, somewhere.

